{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9601388","patent":{"patent_number":"US-9601388","title":"Integrated high-K/metal gate in CMOS process flow","assignee":null,"inventors":[],"filing_date":"2016-01-29T00:00:00.000Z","publication_date":"2017-03-21T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":20,"abstract":"A method of fabricating a semiconductor device includes providing a semiconductor substrate having a first region and a second region, forming a first dielectric layer over the semiconductor substrate, forming a first metal layer over the first dielectric layer, the first metal layer having a first work function, removing at least a portion of the first metal layer in the second region, and thereafter, forming a semiconductor layer over the first metal layer in the first region and over the at least partially removed first metal layer in the second region. The method further includes removing the semiconductor layer and forming a second metal layer on the first metal layer in the first region and on the at least partially removed first metal layer in the second region, the second metal layer having a second work function that is different than the first work function."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Integrated high-K/metal gate in CMOS process flow","description":"A method of fabricating a semiconductor device includes providing a semiconductor substrate having a first region and a second region, forming a first dielectric layer over the semiconductor substrate","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9601388","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9601388","citation_suggestion":"Patentable. \"Integrated high-K/metal gate in CMOS process flow\" (US-9601388). https://patentable.app/patents/US-9601388","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9601388","json":"https://patentable.app/api/llm-context/US-9601388","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T13:16:17.444Z"}