{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9601499","patent":{"patent_number":"US-9601499","title":"One-time programmable memory cell capable of reducing leakage current and preventing slow bit response, and method for programming a memory array comprising the same","assignee":null,"inventors":[],"filing_date":"2016-01-25T00:00:00.000Z","publication_date":"2017-03-21T00:00:00.000Z","cpc_codes":["G11C","G11C","H01L","H01L"],"num_claims":17,"abstract":"A one time programmable (OTP) memory cell includes a select gate transistor, a following gate transistor, and an antifuse varactor. The select gate transistor has a first gate terminal, a first drain terminal and a first source terminal. The following gate transistor has a second gate terminal, a second drain terminal and a second source terminal coupled to the first drain terminal. The antifuse varactor has a third gate terminal, a third drain terminal, and a third source terminal coupled to the second drain terminal. The select gate transistor, the following gate transistor, and the antifuse varactor are formed on a substrate structure."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"One-time programmable memory cell capable of reducing leakage current and preventing slow bit response, and method for programming a memory array comprising the same","description":"A one time programmable (OTP) memory cell includes a select gate transistor, a following gate transistor, and an antifuse varactor. The select gate transistor has a first gate terminal, a first drain ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9601499","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9601499","citation_suggestion":"Patentable. \"One-time programmable memory cell capable of reducing leakage current and preventing slow bit response, and method for programming a memory array comprising the same\" (US-9601499). https://patentable.app/patents/US-9601499","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9601499","json":"https://patentable.app/api/llm-context/US-9601499","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T19:50:52.239Z"}