{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9601501","patent":{"patent_number":"US-9601501","title":"Nonvolatile memory cell structure with assistant gate and memory array thereof","assignee":null,"inventors":[],"filing_date":"2016-05-16T00:00:00.000Z","publication_date":"2017-03-21T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":14,"abstract":"An NVM array includes a plurality of NVM cells, a plurality of word lines extending along a first direction, a plurality of bit lines extending along a second direction, and a plurality of source lines. Each of the NVM cells includes a PMOS select transistor and a PMOS floating gate transistor serially connected to the PMOS select transistor. Each word line is electrically connected to the select gate of the PMOS select transistor. Each bit line is electrically connected to a doping region of the PMOS floating gate transistor of each of the plurality of NVM cells. Each source line is electrically connected to a doping region of the PMOS select transistor."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Nonvolatile memory cell structure with assistant gate and memory array thereof","description":"An NVM array includes a plurality of NVM cells, a plurality of word lines extending along a first direction, a plurality of bit lines extending along a second direction, and a plurality of source line","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9601501","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9601501","citation_suggestion":"Patentable. \"Nonvolatile memory cell structure with assistant gate and memory array thereof\" (US-9601501). https://patentable.app/patents/US-9601501","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9601501","json":"https://patentable.app/api/llm-context/US-9601501","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T10:15:31.035Z"}