{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9607966","patent":{"patent_number":"US-9607966","title":"Chip arrangement","assignee":null,"inventors":[],"filing_date":"2015-04-02T00:00:00.000Z","publication_date":"2017-03-28T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":19,"abstract":"A chip arrangement is provided. The chip arrangement includes: a first chip electrically connected to the first chip carrier top side; a second chip electrically connected to the second chip carrier top side; and electrically insulating material configured to at least partially surround the first chip carrier and the second chip carrier; at least one electrical interconnect configured to electrically contact the first chip to the second chip through the electrically insulating material; one or more first electrically conductive portions formed over and electrically contacted to at least one of the first chip carrier top side and second chip carrier top side, and one or more second electrically conductive portions formed over and electrically contacted to at least one of the first chip carrier bottom side and second chip carrier bottom side."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Chip arrangement","description":"A chip arrangement is provided. The chip arrangement includes: a first chip electrically connected to the first chip carrier top side; a second chip electrically connected to the second chip carrier t","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9607966","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9607966","citation_suggestion":"Patentable. \"Chip arrangement\" (US-9607966). https://patentable.app/patents/US-9607966","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9607966","json":"https://patentable.app/api/llm-context/US-9607966","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:28:40.153Z"}