{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9607967","patent":{"patent_number":"US-9607967","title":"Multi-chip semiconductor package with via components and method for manufacturing the same","assignee":null,"inventors":[],"filing_date":"2015-12-22T00:00:00.000Z","publication_date":"2017-03-28T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":19,"abstract":"A multi-chip semiconductor package includes a lower RDL interposer, a first chip on the lower RDL interposer within a chip mounting area, via components mounted within a peripheral area, and a first molding compound surrounding the first chip and the via components. Each of the via components comprises a substrate portion and a connection portion coupled to the substrate portion. An upper RDL interposer is integrally constructed on the first chip, on the via components, and on the first molding compound. The upper RDL interposer is electrically connected to the connection portion of each of the via components. A second chip is mounted on the upper RDL interposer. A second molding compound surrounds the second chip."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Multi-chip semiconductor package with via components and method for manufacturing the same","description":"A multi-chip semiconductor package includes a lower RDL interposer, a first chip on the lower RDL interposer within a chip mounting area, via components mounted within a peripheral area, and a first m","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9607967","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9607967","citation_suggestion":"Patentable. \"Multi-chip semiconductor package with via components and method for manufacturing the same\" (US-9607967). https://patentable.app/patents/US-9607967","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9607967","json":"https://patentable.app/api/llm-context/US-9607967","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T03:49:48.857Z"}