{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9612844","patent":{"patent_number":"US-9612844","title":"Scheduling execution of instructions on a processor having multiple hardware threads with different execution resources","assignee":null,"inventors":[],"filing_date":"2010-01-18T00:00:00.000Z","publication_date":"2017-04-04T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":8,"abstract":"A method and apparatus are provided for executing instructions of a multi-threaded processor having multiple hardware threads (32, 34) with differing hardware resources comprising the steps of receiving a plurality of streams of instructions (38, 44) and determining which hardware threads are able to receive instructions for execution (40, 46), determining whether a thread determined to be available for executing an instructions has the hardware resources available required by that instructions (36) and executing the instruction in dependence on the result of the determination (50)."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Scheduling execution of instructions on a processor having multiple hardware threads with different execution resources","description":"A method and apparatus are provided for executing instructions of a multi-threaded processor having multiple hardware threads (32, 34) with differing hardware resources comprising the steps of receivi","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9612844","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9612844","citation_suggestion":"Patentable. \"Scheduling execution of instructions on a processor having multiple hardware threads with different execution resources\" (US-9612844). https://patentable.app/patents/US-9612844","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9612844","json":"https://patentable.app/api/llm-context/US-9612844","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T12:36:29.148Z"}