{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9614105","patent":{"patent_number":"US-9614105","title":"Charge-trap NOR with silicon-rich nitride as a charge trap layer","assignee":null,"inventors":[],"filing_date":"2013-04-22T00:00:00.000Z","publication_date":"2017-04-04T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":6,"abstract":"A charge-trapping NOR (CT-NOR) memory device and methods of fabricating a CT-NOR memory device utilizing silicon-rich nitride (SiRN) in a charge-trapping (CT) layer of the CT-NOR memory device."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Charge-trap NOR with silicon-rich nitride as a charge trap layer","description":"A charge-trapping NOR (CT-NOR) memory device and methods of fabricating a CT-NOR memory device utilizing silicon-rich nitride (SiRN) in a charge-trapping (CT) layer of the CT-NOR memory device.","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9614105","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9614105","citation_suggestion":"Patentable. \"Charge-trap NOR with silicon-rich nitride as a charge trap layer\" (US-9614105). https://patentable.app/patents/US-9614105","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9614105","json":"https://patentable.app/api/llm-context/US-9614105","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:41:20.259Z"}