{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9618567","patent":{"patent_number":"US-9618567","title":"Methods and devices for stressing an integrated circuit","assignee":null,"inventors":[],"filing_date":"2011-04-19T00:00:00.000Z","publication_date":"2017-04-11T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":14,"abstract":"Disclosed is in particular a device (2) for stressing an integrated circuit (1) including an electronic chip (10) mounted in a housing (12), the device including a source (20) of thermal stress. The device (2) also includes a thermally conductive coupling member (22), designed to be thermally coupled to the source (20) of thermal stress during the stressing operation. The coupling member (22) includes an end (220) whose geometry is suitable for being introduced into an aperture with a predefined geometry, to be made in the housing (12) of the integrated circuit (1) so as to thermally couple a coupling face (222) of this end (220) with a face (102) of the electronic chip (10)."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Methods and devices for stressing an integrated circuit","description":"Disclosed is in particular a device (2) for stressing an integrated circuit (1) including an electronic chip (10) mounted in a housing (12), the device including a source (20) of thermal stress. The d","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9618567","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9618567","citation_suggestion":"Patentable. \"Methods and devices for stressing an integrated circuit\" (US-9618567). https://patentable.app/patents/US-9618567","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9618567","json":"https://patentable.app/api/llm-context/US-9618567","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T13:17:31.343Z"}