{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9619300","patent":{"patent_number":"US-9619300","title":"Reduction operation device, a processor, and a computer system","assignee":null,"inventors":[],"filing_date":"2011-06-22T00:00:00.000Z","publication_date":"2017-04-11T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":15,"abstract":"A reduction operation device detects a non-correspondence of an operation type or a data type in a reduction arithmetic operation of a parallel processing. The reduction operation device is inputted a plurality of the synchronization signals and data, sets each transmission destinations of the plurality of inputted synchronization signals and the plurality of data corresponding to a next stage of a reduction operation and executes the reduction operation. The synchronization unit in the reduction operation device detects the non-correspondence between the operation type or the data type included in an instruction of the reduction operation after the synchronization is established and controls the arithmetic operation of the arithmetic unit."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Reduction operation device, a processor, and a computer system","description":"A reduction operation device detects a non-correspondence of an operation type or a data type in a reduction arithmetic operation of a parallel processing. The reduction operation device is inputted a","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9619300","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9619300","citation_suggestion":"Patentable. \"Reduction operation device, a processor, and a computer system\" (US-9619300). https://patentable.app/patents/US-9619300","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9619300","json":"https://patentable.app/api/llm-context/US-9619300","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:48:21.286Z"}