{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9619326","patent":{"patent_number":"US-9619326","title":"Methods and systems for implementing redundancy in memory controllers","assignee":null,"inventors":[],"filing_date":"2014-12-09T00:00:00.000Z","publication_date":"2017-04-11T00:00:00.000Z","cpc_codes":["G06F","G06F","G11C"],"num_claims":16,"abstract":"The present disclosure relates to methods and systems for implementing redundancy in memory controllers. The disclosed systems and methods utilize a row of memory blocks, such that each memory block in the row is associated with an independent media unit. Failures of the media units are not correlated, and therefore, a failure in one unit does not affect the data stored in the other units. Parity information associated with the data stored in the memory blocks is stored in a separate memory block. If the data in a single memory block has been corrupted, the data stored in the remaining memory blocks and the parity information is used to retrieve the corrupted data."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Methods and systems for implementing redundancy in memory controllers","description":"The present disclosure relates to methods and systems for implementing redundancy in memory controllers. The disclosed systems and methods utilize a row of memory blocks, such that each memory block i","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9619326","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9619326","citation_suggestion":"Patentable. \"Methods and systems for implementing redundancy in memory controllers\" (US-9619326). https://patentable.app/patents/US-9619326","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9619326","json":"https://patentable.app/api/llm-context/US-9619326","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T11:20:44.754Z"}