{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9619385","patent":{"patent_number":"US-9619385","title":"Single thread cache miss rate estimation","assignee":null,"inventors":[],"filing_date":"2015-02-25T00:00:00.000Z","publication_date":"2017-04-11T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":13,"abstract":"Cache miss rates for threads operating in a simultaneous multi-threading computer processing environment can be estimated. The single thread rates can be estimated by monitoring a shared directory for cache misses for a first thread. Memory access requests can be routed to metering cache directories associated with the particular thread. Single thread misses to the shared directory and single thread misses to the associated metering cache directory are monitored and a performance indication is determined by comparing the cache misses with the thread misses. The directory in the associated metering cache is rotated, and a second sharing performance indication is determined."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Single thread cache miss rate estimation","description":"Cache miss rates for threads operating in a simultaneous multi-threading computer processing environment can be estimated. The single thread rates can be estimated by monitoring a shared directory for","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9619385","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9619385","citation_suggestion":"Patentable. \"Single thread cache miss rate estimation\" (US-9619385). https://patentable.app/patents/US-9619385","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9619385","json":"https://patentable.app/api/llm-context/US-9619385","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T10:17:13.821Z"}