{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9619402","patent":{"patent_number":"US-9619402","title":"Method and apparatus for optimizing translation of a virtual memory address into a physical memory address in a processor having virtual memory","assignee":null,"inventors":[],"filing_date":"2013-11-26T00:00:00.000Z","publication_date":"2017-04-11T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":15,"abstract":"The present disclosure provides a device comprising a memory translation buffer configured to manage (i) a first request for a first search in a page table, wherein the first request is responsive to a first null result of a search for a first address translation in a translation look-aside buffer (“TLB”) and (ii) a second request for a second search in the page table, wherein the second request is responsive to a second null result of a search for a second address translation in the TLB. The memory translation buffer is also configured to compare a virtual memory address of the first request to a virtual memory address of the second request and, based on a result of the comparing the virtual memory address of the first request to the virtual memory address of the second request, access the page table to perform the second search."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method and apparatus for optimizing translation of a virtual memory address into a physical memory address in a processor having virtual memory","description":"The present disclosure provides a device comprising a memory translation buffer configured to manage (i) a first request for a first search in a page table, wherein the first request is responsive to ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9619402","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9619402","citation_suggestion":"Patentable. \"Method and apparatus for optimizing translation of a virtual memory address into a physical memory address in a processor having virtual memory\" (US-9619402). https://patentable.app/patents/US-9619402","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9619402","json":"https://patentable.app/api/llm-context/US-9619402","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:31:43.695Z"}