{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9620217","patent":{"patent_number":"US-9620217","title":"Sub-block erase","assignee":null,"inventors":[],"filing_date":"2015-03-25T00:00:00.000Z","publication_date":"2017-04-11T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C"],"num_claims":18,"abstract":"A method is provided for operating a NAND array that includes a plurality of blocks of memory cells. A block of memory cells in the plurality of blocks includes a plurality of NAND strings having channel lines between first string select switches and second string select switches. The plurality of NAND strings shares a set of word lines between the first and second string select switches. A channel-side erase voltage is applied to the channel lines through the first string select switches in a selected block. Word line-side erase voltages are applied to a selected subset including more than one member of the set of word lines shared by NAND strings in the selected block to induce tunneling in memory cells coupled to the selected subset, while tunneling is inhibited in memory cells coupled to an unselected subset including more than one member of the set of word lines."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Sub-block erase","description":"A method is provided for operating a NAND array that includes a plurality of blocks of memory cells. A block of memory cells in the plurality of blocks includes a plurality of NAND strings having chan","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9620217","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9620217","citation_suggestion":"Patentable. \"Sub-block erase\" (US-9620217). https://patentable.app/patents/US-9620217","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9620217","json":"https://patentable.app/api/llm-context/US-9620217","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:24:03.773Z"}