{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9620369","patent":{"patent_number":"US-9620369","title":"Method for fabricating semiconductor device to integrate transistor with passive device","assignee":null,"inventors":[],"filing_date":"2013-12-11T00:00:00.000Z","publication_date":"2017-04-11T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L"],"num_claims":9,"abstract":"A method for fabricating a semiconductor device, wherein the method comprises steps as follows: A dummy gate with a poly-silicon gate electrode and a passive device having a poly-silicon element layer are firstly provided. A hard mask layer is then formed on the dummy gate and the passive device. Next, a first etching process is performed to remove a portion of the hard mask layer to expose a portion of the poly-silicon element layer. Subsequently, an inner layer dielectric (ILD) is formed on the dummy gate and the poly-silicon element layer, and the ILD is flattened by using the hard mask layer as a polishing stop layer. Thereafter, a second etching process is performed to remove the poly-silicon gate electrode, and a metal gate electrode is formed on the location where the poly-silicon gate electrode was initially disposed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method for fabricating semiconductor device to integrate transistor with passive device","description":"A method for fabricating a semiconductor device, wherein the method comprises steps as follows: A dummy gate with a poly-silicon gate electrode and a passive device having a poly-silicon element layer","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9620369","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9620369","citation_suggestion":"Patentable. \"Method for fabricating semiconductor device to integrate transistor with passive device\" (US-9620369). https://patentable.app/patents/US-9620369","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9620369","json":"https://patentable.app/api/llm-context/US-9620369","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:36:18.476Z"}