{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9620524","patent":{"patent_number":"US-9620524","title":"Array substrate and manufacturing method thereof, display device","assignee":null,"inventors":[],"filing_date":"2014-05-30T00:00:00.000Z","publication_date":"2017-04-11T00:00:00.000Z","cpc_codes":["G02F","G02F","G02F","G02F","G02F","G02F","G02F"],"num_claims":20,"abstract":"An array substrate and a manufacturing method thereof as well as a display device are disclosed. The array substrate includes a gate (21) and a gate insulating layers (22) of TFT formed in this order on a surface of a base substrate (20); a semiconductor active layer (23), an etching stop layer (24), and a source (251)/drain (252) of the TFT formed in this order on a surface of the gate insulating layer (22) corresponding to the gate (21) of the TFT. The source (251) and drain (252) of the TFT contact the semiconductor active layer (23) through respective vias. The array substrate further includes: a shielding electrode (26) formed between the gate (21) of the TFT and the base substrate (20); and an insulating layer (27) formed between the gate (21) of the TFT and the shielding electrode (26). In a region where the gate (21) faces the source (251), the area of the gate (210) is smaller than that of the source (251); and/or in a region where the gate (21) faces the drain (252), the area of the gate (210) is smaller than that of the drain (252). The array substrate according to embodiments of the present invention reduces the parasitic capacitance between the source/drain and the gate of the TFT and improves the quality of a display device."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Array substrate and manufacturing method thereof, display device","description":"An array substrate and a manufacturing method thereof as well as a display device are disclosed. The array substrate includes a gate (21) and a gate insulating layers (22) of TFT formed in this order ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9620524","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9620524","citation_suggestion":"Patentable. \"Array substrate and manufacturing method thereof, display device\" (US-9620524). https://patentable.app/patents/US-9620524","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9620524","json":"https://patentable.app/api/llm-context/US-9620524","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:19:07.292Z"}