{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9626292","patent":{"patent_number":"US-9626292","title":"Memory tile access and selection patterns","assignee":null,"inventors":[],"filing_date":"2016-06-27T00:00:00.000Z","publication_date":"2017-04-18T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G11C","G11C","G11C","G11C","G06F","G06F","G11C","G11C"],"num_claims":20,"abstract":"In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at intersections of a plurality of digit line conductors and a plurality of access line conductors. The selection circuitry includes line drivers that select a storage component of a memory tile based on a corresponding digit line conductor and a corresponding access line conductor to the storage component. The selection circuitry may select two or more storage components of a memory tile in a consecutive manner before selecting the storage components of a different memory tile."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory tile access and selection patterns","description":"In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes multiple memory tiles and selection circuitry. Each memory tile has an array of storage components at int","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9626292","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9626292","citation_suggestion":"Patentable. \"Memory tile access and selection patterns\" (US-9626292). https://patentable.app/patents/US-9626292","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9626292","json":"https://patentable.app/api/llm-context/US-9626292","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:48:24.308Z"}