{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9627032","patent":{"patent_number":"US-9627032","title":"Address generation circuit and memory device including the same","assignee":null,"inventors":[],"filing_date":"2014-12-12T00:00:00.000Z","publication_date":"2017-04-18T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":14,"abstract":"An address generation circuit may include: a first latch unit suitable for latching an address obtained by inverting a part of an input address; a second latch unit suitable for latching the partly inverted input address of the first latch unit, and suitable for latching an added/subtracted address after a first refresh operation during a target refresh period; a third latch unit suitable for latching the partly inverted input address of the first latch unit during a period other than the target refresh period; and an addition/subtraction unit suitable for generating the added/subtracted address by adding/subtracting a predetermined value to/from the latched address of the second latch unit."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Address generation circuit and memory device including the same","description":"An address generation circuit may include: a first latch unit suitable for latching an address obtained by inverting a part of an input address; a second latch unit suitable for latching the partly in","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9627032","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9627032","citation_suggestion":"Patentable. \"Address generation circuit and memory device including the same\" (US-9627032). https://patentable.app/patents/US-9627032","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9627032","json":"https://patentable.app/api/llm-context/US-9627032","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T04:16:56.310Z"}