{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9627040","patent":{"patent_number":"US-9627040","title":"6T static random access memory cell, array and memory thereof","assignee":null,"inventors":[],"filing_date":"2015-11-18T00:00:00.000Z","publication_date":"2017-04-18T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":27,"abstract":"A 6T static random access memory cell, array, and memory thereof are provided, in which the memory cell includes a first inverter, a second inverter, a first NMOS transistor, and a second NMOS transistor. A first high supply voltage and a low supply voltage are coupled to the first inverter. A second high supply voltage and the low supply voltage are coupled to the second inverter. The first NMOS transistor has a gate terminal coupled to a first word line. The first NMOS transistor has a source terminal coupled to the first node. The second NMOS transistor has a gate terminal coupled to a second word line, and the second NMOS transistor has a source terminal coupled to the second node. The first word line provides ON signals to turn on the first NMOS transistor, and the second high supply voltage provides a first boost voltage simultaneously."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"6T static random access memory cell, array and memory thereof","description":"A 6T static random access memory cell, array, and memory thereof are provided, in which the memory cell includes a first inverter, a second inverter, a first NMOS transistor, and a second NMOS transis","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9627040","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9627040","citation_suggestion":"Patentable. \"6T static random access memory cell, array and memory thereof\" (US-9627040). https://patentable.app/patents/US-9627040","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9627040","json":"https://patentable.app/api/llm-context/US-9627040","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:22:36.703Z"}