{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9632141","patent":{"patent_number":"US-9632141","title":"Simultaneous transition testing of different clock domains in a digital integrated circuit","assignee":null,"inventors":[],"filing_date":"2014-06-26T00:00:00.000Z","publication_date":"2017-04-25T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":20,"abstract":"Implementations of the present disclosure involve an apparatus and/or method for conducting simultaneous transition testing of different clock domains of a microprocessor design at different frequencies through a controlled order of clock pulses in each domain. In general, a microelectronic design utilizes test control circuitry associated with each clock domain of the design to conduct simultaneous transition testing of the clock domains. The testing control circuitry associated with each clock domain of the microelectronic design further allows for the testing device to delay testing within a particular clock domain. By delaying the testing within a particular clock domain, the testing of the various clock domains can be synchronized. Through these testing procedures, the amount of time required to perform the ATPG testing of a microelectronic design may be greatly reduced."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Simultaneous transition testing of different clock domains in a digital integrated circuit","description":"Implementations of the present disclosure involve an apparatus and/or method for conducting simultaneous transition testing of different clock domains of a microprocessor design at different frequenci","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9632141","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9632141","citation_suggestion":"Patentable. \"Simultaneous transition testing of different clock domains in a digital integrated circuit\" (US-9632141). https://patentable.app/patents/US-9632141","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9632141","json":"https://patentable.app/api/llm-context/US-9632141","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:05:19.103Z"}