{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9633985","patent":{"patent_number":"US-9633985","title":"First-etched and later-packaged three-dimensional system-in-package normal chip stack package structure and processing method thereof","assignee":null,"inventors":[],"filing_date":"2014-01-08T00:00:00.000Z","publication_date":"2017-04-25T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":10,"abstract":"A first-etched and later-packaged three-dimensional system-in-package normal chip stack package structure and a processing method for manufacturing the same are provided. The structure includes: a die pad (1); a lead (2); a chip (4) provided on a top surface of the die pad (1) by a conductive or non-conductive adhesive material (3); a metal wire (5) via which a top surface of the chip (4) is connected to a top surface of the lead (2); a conductive pillar (6) provided on the surface of the lead (2); and a molding material (7)."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"First-etched and later-packaged three-dimensional system-in-package normal chip stack package structure and processing method thereof","description":"A first-etched and later-packaged three-dimensional system-in-package normal chip stack package structure and a processing method for manufacturing the same are provided. The structure includes: a die","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9633985","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9633985","citation_suggestion":"Patentable. \"First-etched and later-packaged three-dimensional system-in-package normal chip stack package structure and processing method thereof\" (US-9633985). https://patentable.app/patents/US-9633985","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9633985","json":"https://patentable.app/api/llm-context/US-9633985","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T11:14:58.775Z"}