{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9633999","patent":{"patent_number":"US-9633999","title":"Method and structure for semiconductor mid-end-of-line (MEOL) process","assignee":null,"inventors":[],"filing_date":"2015-11-16T00:00:00.000Z","publication_date":"2017-04-25T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A method of forming a semiconductor device provides a precursor that includes a substrate having first and second regions, wherein the first region includes an insulator and the second region includes source, drain, and channel regions of a transistor. The precursor further includes gate stacks over the insulator, and gate stacks over the channel regions. The precursor further includes a first dielectric layer over the gate stacks. The method further includes partially recessing the first dielectric layer; forming a second dielectric layer over the recessed first dielectric layer; and forming a contact etch stop (CES) layer over the second dielectric layer. In an embodiment, the method further includes forming gate via holes over the gate stacks, forming source and drain (S/D) via holes over the S/D regions, and forming vias in the gate via holes and S/D via holes."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method and structure for semiconductor mid-end-of-line (MEOL) process","description":"A method of forming a semiconductor device provides a precursor that includes a substrate having first and second regions, wherein the first region includes an insulator and the second region includes","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9633999","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9633999","citation_suggestion":"Patentable. \"Method and structure for semiconductor mid-end-of-line (MEOL) process\" (US-9633999). https://patentable.app/patents/US-9633999","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9633999","json":"https://patentable.app/api/llm-context/US-9633999","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:44:05.412Z"}