{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9640241","patent":{"patent_number":"US-9640241","title":"Memory device","assignee":null,"inventors":[],"filing_date":"2015-08-25T00:00:00.000Z","publication_date":"2017-05-02T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":35,"abstract":"A memory device includes a plurality of banks suitable for including a plurality of word lines, a plurality of latch units each suitable for generating a first address by inverting a predetermined bit of an address of an activated word line of a corresponding bank and latching the first address as a target address in sections other than a target refresh section, and latching an operation address as the target address once in an all-bank refresh section of the target refresh section, wherein all of the plurality of banks are refreshed in the all-bank refresh section. All the plurality of banks are refreshed in the all-bank refresh section, and an address operation unit suitable for generating the operation address by adding or subtracting an operation value to or from the target address. A word line among the plurality of word lines that is selected using the target address may be refreshed in the target refresh section."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory device","description":"A memory device includes a plurality of banks suitable for including a plurality of word lines, a plurality of latch units each suitable for generating a first address by inverting a predetermined bit","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9640241","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9640241","citation_suggestion":"Patentable. \"Memory device\" (US-9640241). https://patentable.app/patents/US-9640241","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9640241","json":"https://patentable.app/api/llm-context/US-9640241","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T06:06:32.928Z"}