{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9640474","patent":{"patent_number":"US-9640474","title":"Power semiconductor package having power semiconductor die in a support substrate with bar vias","assignee":null,"inventors":[],"filing_date":"2016-02-24T00:00:00.000Z","publication_date":"2017-05-02T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":19,"abstract":"A semiconductor package includes an output inductor placed over a support substrate, a power semiconductor die having a bottom surface situated on the support substrate and a top surface having an active region, where the output inductor is coupled to the active region on the top surface of the support substrate, and where the support substrate includes a plurality of bar vias. The output inductor is a packaged component having at least two leads in electrical connection with the active region of the power semiconductor die. The support substrate further includes routing conductors in electrical connection with the active region of the power semiconductor die. The power semiconductor die includes a control transistor and a sync transistor connected in a half-bridge."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Power semiconductor package having power semiconductor die in a support substrate with bar vias","description":"A semiconductor package includes an output inductor placed over a support substrate, a power semiconductor die having a bottom surface situated on the support substrate and a top surface having an act","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9640474","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9640474","citation_suggestion":"Patentable. \"Power semiconductor package having power semiconductor die in a support substrate with bar vias\" (US-9640474). https://patentable.app/patents/US-9640474","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9640474","json":"https://patentable.app/api/llm-context/US-9640474","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T04:56:02.108Z"}