{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9646973","patent":{"patent_number":"US-9646973","title":"Dual-port SRAM cell structure with vertical devices","assignee":null,"inventors":[],"filing_date":"2015-03-27T00:00:00.000Z","publication_date":"2017-05-09T00:00:00.000Z","cpc_codes":["H01L"],"num_claims":20,"abstract":"Dual-Port SRAM cells are described. In an embodiment, a cell includes first and second pull-down, first and second pull-up, and first through fourth pass-gate transistors. Each transistor includes a first source/drain region in an active area, a channel extending above the active area, and a second source/drain region above the channel. First source/drain regions of pull-down transistors are electrically coupled through a first active area. First source/drain regions of pull-up transistors are electrically coupled through a second active area. A first, and a second, gate electrode is around channels of the first, and second, pull-down and pull-up transistors, respectively. Second source/drain regions of the first pull-down, first pull-up, and first and third pass-gate transistors are electrically coupled to the second gate electrode. Second source/drain regions of the second pull-down, second pull-up, and second and fourth pass-gate transistors are electrically coupled to the first gate electrode."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Dual-port SRAM cell structure with vertical devices","description":"Dual-Port SRAM cells are described. In an embodiment, a cell includes first and second pull-down, first and second pull-up, and first through fourth pass-gate transistors. Each transistor includes a f","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9646973","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9646973","citation_suggestion":"Patentable. \"Dual-port SRAM cell structure with vertical devices\" (US-9646973). https://patentable.app/patents/US-9646973","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9646973","json":"https://patentable.app/api/llm-context/US-9646973","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:00:18.777Z"}