{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9652027","patent":{"patent_number":"US-9652027","title":"Thread scheduling based on performance state and idle state of processing units","assignee":null,"inventors":[],"filing_date":"2015-04-01T00:00:00.000Z","publication_date":"2017-05-16T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":20,"abstract":"A computing system having a plurality of processing units configured to perform work by having threads assigned to the processing units. A thread scheduler is coupled to the plurality of processors and configured to schedule threads to the processing units. A power manager is coupled to the thread scheduler and controls performance states or idle states of the processing units. The thread scheduler maintains information about current performance state or idle state per processing unit. The information includes a multi-level description of the processing units in the computing system. The multi-level description includes three or more different entry values of different levels for performance state or idle state for processing units. The power manager provides the multi-level description of the processing units to the thread scheduler, which is configured to schedule threads to the processing units based on the multi-level description."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Thread scheduling based on performance state and idle state of processing units","description":"A computing system having a plurality of processing units configured to perform work by having threads assigned to the processing units. A thread scheduler is coupled to the plurality of processors an","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9652027","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9652027","citation_suggestion":"Patentable. \"Thread scheduling based on performance state and idle state of processing units\" (US-9652027). https://patentable.app/patents/US-9652027","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9652027","json":"https://patentable.app/api/llm-context/US-9652027","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T14:41:22.884Z"}