{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9652176","patent":{"patent_number":"US-9652176","title":"Memory controller for micro-threaded memory operations","assignee":null,"inventors":[],"filing_date":"2014-08-01T00:00:00.000Z","publication_date":"2017-05-16T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":16,"abstract":"A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time interval must transpire between successive accesses to a given row of the storage cells. Transfer control circuitry is provided to transfer a first amount of data between the plurality of storage banks and an external signal path in response to a first memory access request, the first amount of data being less than a product of the external signal path bandwidth and the minimum access time interval."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory controller for micro-threaded memory operations","description":"A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time i","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9652176","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9652176","citation_suggestion":"Patentable. \"Memory controller for micro-threaded memory operations\" (US-9652176). https://patentable.app/patents/US-9652176","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9652176","json":"https://patentable.app/api/llm-context/US-9652176","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T03:45:03.549Z"}