{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9652315","patent":{"patent_number":"US-9652315","title":"Multi-core RAM error detection and correction (EDAC) test","assignee":null,"inventors":[],"filing_date":"2015-07-21T00:00:00.000Z","publication_date":"2017-05-16T00:00:00.000Z","cpc_codes":["G06F","G06F","G11C","G11C","G11C","G11C","G11C","G11C"],"num_claims":17,"abstract":"A system and method for detection and correction of single-bit errors in a multi-core processing resource (MCPR) of an avionics processing system includes a RAM EDAC testing module called by the MCPR health monitor to access EDAC registers of a system-on-chip module coupled to the MCPR and access memory addresses passed by the MCPR health monitor to detect single-bit errors. Single-bit errors detected in memory mapped to the hypervisor are corrected by the RAM EDAC testing module. Single-bit errors detected in memory associated with a partition or core of the MCPR are corrected by the health monitor running on the particular partition or core with which the memory portion is associated. Single-bit errors may be detected in unmapped memory associated with a partition or core by accessing the unmapped memory via a temporary TLB entry."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Multi-core RAM error detection and correction (EDAC) test","description":"A system and method for detection and correction of single-bit errors in a multi-core processing resource (MCPR) of an avionics processing system includes a RAM EDAC testing module called by the MCPR ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9652315","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9652315","citation_suggestion":"Patentable. \"Multi-core RAM error detection and correction (EDAC) test\" (US-9652315). https://patentable.app/patents/US-9652315","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9652315","json":"https://patentable.app/api/llm-context/US-9652315","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:33:00.983Z"}