{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9653386","patent":{"patent_number":"US-9653386","title":"Compact multi-die power semiconductor package","assignee":null,"inventors":[],"filing_date":"2014-10-16T00:00:00.000Z","publication_date":"2017-05-16T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H02M","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":15,"abstract":"One disclosed implementation is a power semiconductor package including a sync transistor having a drain on its top surface and a source and a gate on its bottom surface. The source of the sync transistor is configured for attachment to a first partially etched leadframe segment and the gate of the sync transistor is configured for attachment to a second partially etched leadframe segment. A control transistor has a source and a gate on its top surface and a drain on its bottom surface. The drain of the control transistor is configured for attachment to a third partially etched leadframe segment. A first conductive clip extends to the substrate and is situated over the drain of the sync transistor and the source of the control transistor, the first conductive clip coupling the drain of the sync transistor and the source of the control transistor to the substrate without using a leadframe."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Compact multi-die power semiconductor package","description":"One disclosed implementation is a power semiconductor package including a sync transistor having a drain on its top surface and a source and a gate on its bottom surface. The source of the sync transi","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9653386","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9653386","citation_suggestion":"Patentable. \"Compact multi-die power semiconductor package\" (US-9653386). https://patentable.app/patents/US-9653386","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9653386","json":"https://patentable.app/api/llm-context/US-9653386","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T19:50:42.777Z"}