{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9653438","patent":{"patent_number":"US-9653438","title":"Electrical interconnect structure for an embedded semiconductor device package and method of manufacturing thereof","assignee":null,"inventors":[],"filing_date":"2014-08-21T00:00:00.000Z","publication_date":"2017-05-16T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":23,"abstract":"An electronics package includes a first dielectric substrate having a first plurality of vias formed through a thickness thereof, a metalized contact layer coupled to a top surface of the first dielectric substrate, and a first die positioned within a first die opening formed through the thickness of the first dielectric substrate. Metalized interconnects are formed on a bottom surface of the first dielectric substrate and extend through the first plurality of vias to contact the metalized contact layer. A second dielectric substrate is coupled to the first dielectric substrate and has a second plurality of vias formed through a thickness thereof. Metalized interconnects extend through the second plurality of vias to contact the first plurality of metalized interconnects and contact pads of the first die. A first conductive element electrically couples the first die to the metalized contact layer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Electrical interconnect structure for an embedded semiconductor device package and method of manufacturing thereof","description":"An electronics package includes a first dielectric substrate having a first plurality of vias formed through a thickness thereof, a metalized contact layer coupled to a top surface of the first dielec","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9653438","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9653438","citation_suggestion":"Patentable. \"Electrical interconnect structure for an embedded semiconductor device package and method of manufacturing thereof\" (US-9653438). https://patentable.app/patents/US-9653438","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9653438","json":"https://patentable.app/api/llm-context/US-9653438","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:36:24.850Z"}