{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9653543","patent":{"patent_number":"US-9653543","title":"Methods of fabricating isolation regions of semiconductor devices and structures thereof","assignee":null,"inventors":[],"filing_date":"2014-12-03T00:00:00.000Z","publication_date":"2017-05-16T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L"],"num_claims":22,"abstract":"Methods of fabricating isolation regions of semiconductor devices and structures thereof are disclosed. In a preferred embodiment, a semiconductor device includes a workpiece and at least one trench formed in the workpiece. The at least one trench includes sidewalls, a bottom surface, a lower portion, and an upper portion. A first liner is disposed over the sidewalls and the bottom surface of the at least one trench. A second liner is disposed over the first liner in the lower portion of the at least one trench. A first insulating material is disposed over the second liner in the lower portion of the at least one trench. A second insulating material is disposed over the first insulating material in the upper portion of the at least one trench. The first liner, the second liner, the first insulating material, and the second insulating material comprise an isolation region of the semiconductor device."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Methods of fabricating isolation regions of semiconductor devices and structures thereof","description":"Methods of fabricating isolation regions of semiconductor devices and structures thereof are disclosed. In a preferred embodiment, a semiconductor device includes a workpiece and at least one trench f","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9653543","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9653543","citation_suggestion":"Patentable. \"Methods of fabricating isolation regions of semiconductor devices and structures thereof\" (US-9653543). https://patentable.app/patents/US-9653543","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9653543","json":"https://patentable.app/api/llm-context/US-9653543","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:21:40.082Z"}