{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9653563","patent":{"patent_number":"US-9653563","title":"Connection structure for vertical gate all around (VGAA) devices on semiconductor on insulator (SOI) substrate","assignee":null,"inventors":[],"filing_date":"2014-04-18T00:00:00.000Z","publication_date":"2017-05-16T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":21,"abstract":"A vertical gate all around (VGAA) nanowire device circuit routing structure is disclosed. The circuit routing structure comprises a plurality of VGAA nanowire devices including a NMOS and a PMOS device. The devices are formed on a semiconductor-on-insulator substrate. Each device comprises a bottom plate and a top plate wherein one of the bottom and top plates serves as a drain node and the other serves as a source node. Each device further comprises a gate layer. The gate layer fully surrounds a vertical channel in the device. In one example, a CMOS circuit is formed with an oxide (OD) block layer that serves as a common bottom plate for the NMOS and PMOS devices. In another example, a CMOS circuit is formed with a top plate that serves as a common top plate for the NMOS device and the PMOS devices. In another example, a SRAM circuit is formed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Connection structure for vertical gate all around (VGAA) devices on semiconductor on insulator (SOI) substrate","description":"A vertical gate all around (VGAA) nanowire device circuit routing structure is disclosed. The circuit routing structure comprises a plurality of VGAA nanowire devices including a NMOS and a PMOS devic","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9653563","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9653563","citation_suggestion":"Patentable. \"Connection structure for vertical gate all around (VGAA) devices on semiconductor on insulator (SOI) substrate\" (US-9653563). https://patentable.app/patents/US-9653563","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9653563","json":"https://patentable.app/api/llm-context/US-9653563","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:00:23.828Z"}