{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9653568","patent":{"patent_number":"US-9653568","title":"Method of manufacturing an insulated gate bipolar transistor with mesa sections between cell trench structures","assignee":null,"inventors":[],"filing_date":"2015-06-09T00:00:00.000Z","publication_date":"2017-05-16T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L"],"num_claims":5,"abstract":"A method of manufacturing an insulated gate bipolar transistor includes providing trenches extending from a first surface to a layer section in a semiconductor portion, introducing impurities into mesa sections between the trenches, and forming, from the introduced impurities, second portions of doped regions separated from source regions by body regions. The source regions are electrically connected to an emitter electrode. The second portions have a second mean net impurity concentration exceeding at least ten times a first mean net impurity concentration in first portions of the doped layer. The first portions extend from the body regions to the layer section, respectively."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Method of manufacturing an insulated gate bipolar transistor with mesa sections between cell trench structures","description":"A method of manufacturing an insulated gate bipolar transistor includes providing trenches extending from a first surface to a layer section in a semiconductor portion, introducing impurities into mes","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9653568","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9653568","citation_suggestion":"Patentable. \"Method of manufacturing an insulated gate bipolar transistor with mesa sections between cell trench structures\" (US-9653568). https://patentable.app/patents/US-9653568","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9653568","json":"https://patentable.app/api/llm-context/US-9653568","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T15:38:46.040Z"}