{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9659618","patent":{"patent_number":"US-9659618","title":"Memory interface, memory control circuit unit, memory storage device and clock generation method","assignee":null,"inventors":[],"filing_date":"2016-07-27T00:00:00.000Z","publication_date":"2017-05-23T00:00:00.000Z","cpc_codes":["G11C","G06F","G06F","G06F","G06F","G11C","G11C"],"num_claims":30,"abstract":"A memory interface, a memory control circuit unit, a memory storage device and a clock generation method are provided. The method includes: receiving a first data strobe signal and a second data strobe signal from a volatile memory, where the first data strobe signal and the second data strobe signal are differential signals corresponding to each other; if a relative relation between a first voltage value of the first data strobe signal and a reference voltage value of a reference voltage signal conforms to a default condition, generating a clock signal in response to the first data strobe signal and the second data strobe signal; and sampling a data signal from the volatile memory based on a raising edge and a falling edge of the clock signal. Thereby, an accuracy for sampling the data signal from the volatile memory can be improved."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory interface, memory control circuit unit, memory storage device and clock generation method","description":"A memory interface, a memory control circuit unit, a memory storage device and a clock generation method are provided. The method includes: receiving a first data strobe signal and a second data strob","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9659618","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9659618","citation_suggestion":"Patentable. \"Memory interface, memory control circuit unit, memory storage device and clock generation method\" (US-9659618). https://patentable.app/patents/US-9659618","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9659618","json":"https://patentable.app/api/llm-context/US-9659618","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T13:17:51.394Z"}