{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9660069","patent":{"patent_number":"US-9660069","title":"Group III nitride integration with CMOS technology","assignee":null,"inventors":[],"filing_date":"2016-04-20T00:00:00.000Z","publication_date":"2017-05-23T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":15,"abstract":"A method of forming a structure that can be used to integrate Si-based devices, i.e., nFETs and pFETs, with Group III nitride-based devices is provided. The method includes providing a substrate containing an nFET device region, a pFET device region and a Group III nitride device region, wherein the substrate includes a topmost silicon layer and a <111> silicon layer located beneath the topmost silicon layer. Next, a trench is formed within the Group III nitride device region to expose a sub-surface of the <111> silicon layer. The trench is then partially filled with a Group III nitride base material, wherein the Group III nitride material base material has a topmost surface that is coplanar with, or below, a topmost surface of the topmost silicon layer."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Group III nitride integration with CMOS technology","description":"A method of forming a structure that can be used to integrate Si-based devices, i.e., nFETs and pFETs, with Group III nitride-based devices is provided. The method includes providing a substrate conta","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9660069","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9660069","citation_suggestion":"Patentable. \"Group III nitride integration with CMOS technology\" (US-9660069). https://patentable.app/patents/US-9660069","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9660069","json":"https://patentable.app/api/llm-context/US-9660069","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:41:32.630Z"}