{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9666511","patent":{"patent_number":"US-9666511","title":"Isolation method for a stand alone high voltage laterally-diffused metal-oxide semiconductor (LDMOS) transistor","assignee":null,"inventors":[],"filing_date":"2015-01-15T00:00:00.000Z","publication_date":"2017-05-30T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":18,"abstract":"A semiconductor package having a lead frame over which a first device and a second device are spaced is provided. The lead frame includes a die pad upon which a first chip and a second chip are spaced and bonded. The first chip includes the first device, which has a first operating voltage. The second chip includes the second device, which has a second operating voltage greater than the first operating voltage. A dielectric layer is arranged between the die pad and the second device. A method for manufacturing the semiconductor package is also provided."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Isolation method for a stand alone high voltage laterally-diffused metal-oxide semiconductor (LDMOS) transistor","description":"A semiconductor package having a lead frame over which a first device and a second device are spaced is provided. The lead frame includes a die pad upon which a first chip and a second chip are spaced","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9666511","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9666511","citation_suggestion":"Patentable. \"Isolation method for a stand alone high voltage laterally-diffused metal-oxide semiconductor (LDMOS) transistor\" (US-9666511). https://patentable.app/patents/US-9666511","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9666511","json":"https://patentable.app/api/llm-context/US-9666511","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T04:32:17.479Z"}