{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9666544","patent":{"patent_number":"US-9666544","title":"Package substrate differential impedance optimization for 25 GBPS and beyond","assignee":null,"inventors":[],"filing_date":"2015-06-02T00:00:00.000Z","publication_date":"2017-05-30T00:00:00.000Z","cpc_codes":["H01L","G06F","G06F","G06F","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":15,"abstract":"A package design method is disclosed for the optimization of package differential impedance at data rates of 25 Gb/s and beyond. The method optimizes the differential impedance of package vertical interconnections of BGA ball, via, and PTH as well as around the joint between the vertical interconnection and the horizontal interconnection of trace. At 8 ps rise time, a <5% impedance variation is obtained with a 0.8 mm BGA ball pitch and a 10-layer buildup substrate and a <10% impedance variation is obtained with a 1 mm BGA ball pitch and a 14-layer buildup substrate. The method is applicable to all BGA package designs running at 25 Gb/s and beyond."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Package substrate differential impedance optimization for 25 GBPS and beyond","description":"A package design method is disclosed for the optimization of package differential impedance at data rates of 25 Gb/s and beyond. The method optimizes the differential impedance of package vertical int","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9666544","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9666544","citation_suggestion":"Patentable. \"Package substrate differential impedance optimization for 25 GBPS and beyond\" (US-9666544). https://patentable.app/patents/US-9666544","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9666544","json":"https://patentable.app/api/llm-context/US-9666544","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T11:20:51.066Z"}