{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9666709","patent":{"patent_number":"US-9666709","title":"Non-planar semiconductor structure with preserved isolation region","assignee":null,"inventors":[],"filing_date":"2015-01-29T00:00:00.000Z","publication_date":"2017-05-30T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":7,"abstract":"A non-planar semiconductor structure includes a semiconductor substrate, multiple raised semiconductor structures coupled to the substrate, a drain well in each of the raised structures, and a drain in each drain well. The structure further includes an isolation region in each drain well adjacent the drain, each isolation region reaching to a top surface of the corresponding raised structure, and a conductive center gate on each raised structure, the conductive center gate covering a top surface, a front surface and a back surface thereof, and covering a portion of the isolation region opposite the drain. The isolation regions in the drain wells reaching to the raised structure top surface is a result of preserving the isolation region by covering it during fabrication with an HDP oxide to prevent partial removal."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Non-planar semiconductor structure with preserved isolation region","description":"A non-planar semiconductor structure includes a semiconductor substrate, multiple raised semiconductor structures coupled to the substrate, a drain well in each of the raised structures, and a drain i","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9666709","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9666709","citation_suggestion":"Patentable. \"Non-planar semiconductor structure with preserved isolation region\" (US-9666709). https://patentable.app/patents/US-9666709","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9666709","json":"https://patentable.app/api/llm-context/US-9666709","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:59:18.289Z"}