{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9672045","patent":{"patent_number":"US-9672045","title":"Checkpoints for a simultaneous multithreading processor","assignee":null,"inventors":[],"filing_date":"2014-09-30T00:00:00.000Z","publication_date":"2017-06-06T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":16,"abstract":"According to an aspect, a system for checkpoint acceleration in a simultaneous multithreading (SMT) processor includes circuitry of a processor core of the SMT processor to execute one or more threads in a processing pipeline. The processing pipeline includes a completion stage followed by a checkpoint stage. The system also includes a checkpoint accelerator disposed between the completion stage and the checkpoint stage. The checkpoint accelerator includes a backlog queue that stores a list of next-to-complete groups of instructions from the one or more threads anticipated to complete in an upcoming cycle. The checkpoint accelerator also includes a selection control that drives one or more of the next-to-complete groups of instructions from the backlog queue to the checkpoint stage based on one or more completion indicators that identify which of the next-to-complete groups of instructions actually completed."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Checkpoints for a simultaneous multithreading processor","description":"According to an aspect, a system for checkpoint acceleration in a simultaneous multithreading (SMT) processor includes circuitry of a processor core of the SMT processor to execute one or more threads","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9672045","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9672045","citation_suggestion":"Patentable. \"Checkpoints for a simultaneous multithreading processor\" (US-9672045). https://patentable.app/patents/US-9672045","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9672045","json":"https://patentable.app/api/llm-context/US-9672045","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T04:08:51.896Z"}