{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9673188","patent":{"patent_number":"US-9673188","title":"Integrated electrostatic discharge (ESD) clamping for an LDMOS transistor device having a bipolar transistor","assignee":null,"inventors":[],"filing_date":"2015-12-11T00:00:00.000Z","publication_date":"2017-06-06T00:00:00.000Z","cpc_codes":["H01L","H01L"],"num_claims":20,"abstract":"A method of fabricating a laterally diffused metal-oxide-semiconductor (LDMOS) transistor device having a bipolar transistor for electrostatic discharge (ESD) protection includes doping a substrate to form a body region of the LDMOS transistor device in the substrate, the body region having a first conductivity type, forming a doped isolating region of the LDMOS transistor device in the substrate, the doped isolating region having a second conductivity type and surrounding a device area of the LDMOS transistor device in which the body region is disposed, forming a base contact region of the bipolar transistor, the base contact region being disposed within the body region and having the first conductivity type, and doping the substrate to form an isolation contact region for the doped isolating region that defines a collector region of the bipolar transistor, to form source and drain regions of the LDMOS transistor device in the substrate, and to form an emitter region of the bipolar transistor within the body region."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Integrated electrostatic discharge (ESD) clamping for an LDMOS transistor device having a bipolar transistor","description":"A method of fabricating a laterally diffused metal-oxide-semiconductor (LDMOS) transistor device having a bipolar transistor for electrostatic discharge (ESD) protection includes doping a substrate to","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9673188","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9673188","citation_suggestion":"Patentable. \"Integrated electrostatic discharge (ESD) clamping for an LDMOS transistor device having a bipolar transistor\" (US-9673188). https://patentable.app/patents/US-9673188","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9673188","json":"https://patentable.app/api/llm-context/US-9673188","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T10:14:01.809Z"}