{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9678749","patent":{"patent_number":"US-9678749","title":"Instruction and logic for shift-sum multiplier","assignee":null,"inventors":[],"filing_date":"2014-12-22T00:00:00.000Z","publication_date":"2017-06-13T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F","G06F"],"num_claims":20,"abstract":"A processor includes a front end including a decoder, an execution unit including a shift-sum multiplier (SSM), and a retirement unit. The decoder includes logic identify a multiplication instruction to multiply a first number and a second number. The execution unit includes logic to, based on the instruction, access a look-up table based on the second number to determine a plurality of shift parameters and one or more flag parameters. The SSM includes logic to use the shift parameters to shift the first number to determine a plurality of partial products, and the flag parameters to determine signs of the partial products. The SSM also includes logic to sum the partial products to yield a result of the multiplication instruction."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Instruction and logic for shift-sum multiplier","description":"A processor includes a front end including a decoder, an execution unit including a shift-sum multiplier (SSM), and a retirement unit. The decoder includes logic identify a multiplication instruction ","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9678749","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9678749","citation_suggestion":"Patentable. \"Instruction and logic for shift-sum multiplier\" (US-9678749). https://patentable.app/patents/US-9678749","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9678749","json":"https://patentable.app/api/llm-context/US-9678749","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T07:32:36.043Z"}