{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9679881","patent":{"patent_number":"US-9679881","title":"Semiconductor device and method of forming cavity adjacent to sensitive region of semiconductor die using wafer-level underfill material","assignee":null,"inventors":[],"filing_date":"2013-09-09T00:00:00.000Z","publication_date":"2017-06-13T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":20,"abstract":"A semiconductor wafer has a plurality of first semiconductor die with a stress sensitive region. A masking layer or screen is disposed over the stress sensitive region. An underfill material is deposited over the wafer. The masking layer or screen prevents formation of the underfill material adjacent to the sensitive region. The masking layer or screen is removed leaving a cavity in the underfill material adjacent to the sensitive region. The semiconductor wafer is singulated into the first die. The first die can be mounted to a build-up interconnect structure or to a second semiconductor die with the cavity separating the sensitive region and build-up interconnect structure or second die. A bond wire is formed between the first and second die and an encapsulant is deposited over the first and second die and bond wire. A conductive via can be formed through the first or second die."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor device and method of forming cavity adjacent to sensitive region of semiconductor die using wafer-level underfill material","description":"A semiconductor wafer has a plurality of first semiconductor die with a stress sensitive region. A masking layer or screen is disposed over the stress sensitive region. An underfill material is deposi","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9679881","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9679881","citation_suggestion":"Patentable. \"Semiconductor device and method of forming cavity adjacent to sensitive region of semiconductor die using wafer-level underfill material\" (US-9679881). https://patentable.app/patents/US-9679881","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9679881","json":"https://patentable.app/api/llm-context/US-9679881","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:33:25.064Z"}