{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9680475","patent":{"patent_number":"US-9680475","title":"Early global set/reset signal determination for programmable logic devices","assignee":null,"inventors":[],"filing_date":"2016-03-17T00:00:00.000Z","publication_date":"2017-06-13T00:00:00.000Z","cpc_codes":["G06F"],"num_claims":17,"abstract":"Techniques are provided to assign a set/reset signal of a user design to global set/reset (GSR) resources of a programmable logic device (PLD). By assigning a set/reset signal of the user design to the GSR resources during synthesis and prior to mapping, configurable resources consumed by the design may be reduced. In one example, a method includes receiving a user design for a programmable logic device (PLD) that comprises a plurality of configurable resources and global set/reset (GSR) resources. The method also includes identifying a plurality of set/reset signals of the user design. The method also includes determining, for each set/reset signal, a measurement of configurable resource savings associated with an assignment of the set/reset signal to the GSR resources. The method also includes assigning a selected one of the set/reset signals to the GSR resources based on the associated measurement. Additional methods and related systems are also provided."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Early global set/reset signal determination for programmable logic devices","description":"Techniques are provided to assign a set/reset signal of a user design to global set/reset (GSR) resources of a programmable logic device (PLD). By assigning a set/reset signal of the user design to th","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9680475","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9680475","citation_suggestion":"Patentable. \"Early global set/reset signal determination for programmable logic devices\" (US-9680475). https://patentable.app/patents/US-9680475","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9680475","json":"https://patentable.app/api/llm-context/US-9680475","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:12:51.850Z"}