{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9684605","patent":{"patent_number":"US-9684605","title":"Translation lookaside buffer for guest physical addresses in a virtual machine","assignee":null,"inventors":[],"filing_date":"2015-02-23T00:00:00.000Z","publication_date":"2017-06-20T00:00:00.000Z","cpc_codes":["G06F","G06F","G06F","G06F"],"num_claims":16,"abstract":"Embodiments of an invention for a guest-physical address translation lookaside buffer are disclosed. In an embodiment, a processor includes an instruction decoder, a control register, and memory address translation hardware. The instruction decoder is to receive an instruction to transfer control of the processor to guest software to execute on a virtual machine. The virtual machine is to have a plurality of resources to be controlled by a virtual machine monitor. The virtual machine monitor is to execute on a host machine having a host-physical memory to be accessed using a plurality of host-physical addresses. The plurality of resources is to include a guest-physical memory. The guest software is to access the guest-physical memory using a plurality of guest-virtual addresses. The control register is to store a pointer to a plurality of virtual address page tables. The memory address translation hardware is to translate, without causing a virtual machine exit, guest-virtual addresses to host-physical addresses using the plurality of virtual address page tables and a plurality of extended page tables. The memory address translation hardware includes a virtual address translation lookaside buffer in which to store a plurality of virtual address entries corresponding to guest-virtual address to host-physical address translations. The memory address translation hardware also includes a guest-physical address translation lookaside buffer in which to store a plurality of guest-physical address entries corresponding to guest-physical address to host-physical address translations."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Translation lookaside buffer for guest physical addresses in a virtual machine","description":"Embodiments of an invention for a guest-physical address translation lookaside buffer are disclosed. In an embodiment, a processor includes an instruction decoder, a control register, and memory addre","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9684605","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9684605","citation_suggestion":"Patentable. \"Translation lookaside buffer for guest physical addresses in a virtual machine\" (US-9684605). https://patentable.app/patents/US-9684605","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9684605","json":"https://patentable.app/api/llm-context/US-9684605","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:29:56.148Z"}