{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9684747","patent":{"patent_number":"US-9684747","title":"Parameter modeling for semiconductor arrangements","assignee":null,"inventors":[],"filing_date":"2015-02-03T00:00:00.000Z","publication_date":"2017-06-20T00:00:00.000Z","cpc_codes":["G06F"],"num_claims":20,"abstract":"One or more systems and techniques for modeling are provided. An original device model, such as a SPICE model, is used as a basis for fabricating a semiconductor arrangement, such as an integrated circuit arrangement, upon a semiconductor wafer. Fabrication process variations cause measured e-parameters and measured size e-parameters of the semiconductor arrangement to vary from original design parameters of the original device model. Accordingly, a partial set of e-parameters and a partial set of size e-parameters are measured from the semiconductor arrangement, and are expanded into a full set of e-parameters and a full set of size e-parameters using e-parameter derivation and size-centric derivation. The original device model is retargeted using the full set of e-parameters and the full set of size e-parameters to create a new device model that more accurately represents the real-world or fabricated semiconductor arrangement."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Parameter modeling for semiconductor arrangements","description":"One or more systems and techniques for modeling are provided. An original device model, such as a SPICE model, is used as a basis for fabricating a semiconductor arrangement, such as an integrated cir","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9684747","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9684747","citation_suggestion":"Patentable. \"Parameter modeling for semiconductor arrangements\" (US-9684747). https://patentable.app/patents/US-9684747","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9684747","json":"https://patentable.app/api/llm-context/US-9684747","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T10:34:40.642Z"}