{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9685215","patent":{"patent_number":"US-9685215","title":"Semiconductor memory device including a ferroelectric layer","assignee":null,"inventors":[],"filing_date":"2016-08-24T00:00:00.000Z","publication_date":"2017-06-20T00:00:00.000Z","cpc_codes":["G11C","G11C","G11C","G11C"],"num_claims":19,"abstract":"A semiconductor memory device may include a pillar, a gate and at least one ferroelectric layer. The pillar may include a source, a drain and a channel region. The drain may be arranged over the source. The channel region may be arranged between the source and the drain. The gate may be formed on an outer surface of the pillar. The ferroelectric layer may be interposed between the pillar and the gate."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Semiconductor memory device including a ferroelectric layer","description":"A semiconductor memory device may include a pillar, a gate and at least one ferroelectric layer. The pillar may include a source, a drain and a channel region. The drain may be arranged over the sourc","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9685215","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9685215","citation_suggestion":"Patentable. \"Semiconductor memory device including a ferroelectric layer\" (US-9685215). https://patentable.app/patents/US-9685215","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9685215","json":"https://patentable.app/api/llm-context/US-9685215","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T09:13:45.198Z"}