{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9685220","patent":{"patent_number":"US-9685220","title":"DDR controller, method for implementing the same, and chip","assignee":null,"inventors":[],"filing_date":"2011-07-25T00:00:00.000Z","publication_date":"2017-06-20T00:00:00.000Z","cpc_codes":["G11C","G06F","G11C"],"num_claims":9,"abstract":"There are provided a DDR controller, a method for implementing the same and a chip, which are applicable to the field of DDR controller technology. The method includes the steps of: parsing a plurality of buffered commands concurrently (S501); prejudging relationships between a bank and a row of an address to be accessed by each parsed command and a bank and a row of an address for a currently executed command; and transmitting a PRECHARGE command and an ACTIVE command in advance. With the above technical solution, the PRECHARGE command and ACTIVE command which should have been transmitted serially can be transmitted in advance by being hidden in parallel in a Read or WRITE period to thereby make full use of a bandwidth of a DDR device."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"DDR controller, method for implementing the same, and chip","description":"There are provided a DDR controller, a method for implementing the same and a chip, which are applicable to the field of DDR controller technology. The method includes the steps of: parsing a pluralit","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9685220","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9685220","citation_suggestion":"Patentable. \"DDR controller, method for implementing the same, and chip\" (US-9685220). https://patentable.app/patents/US-9685220","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9685220","json":"https://patentable.app/api/llm-context/US-9685220","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T16:52:02.247Z"}