{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9685322","patent":{"patent_number":"US-9685322","title":"Layer deposition on III-V semiconductors","assignee":null,"inventors":[],"filing_date":"2014-09-17T00:00:00.000Z","publication_date":"2017-06-20T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":13,"abstract":"The present disclosure relates to a method (100) for depositing a layer on a III-V semiconductor substrate, in which this method comprises providing (102) a passivated III-V semiconductor substrate comprising a III-V semiconductor surface which has a surface passivation layer provided thereon for preventing oxidation of said III-V semiconductor surface. The surface passivation layer comprises a self-assembled monolayer material obtainable by the reaction on the surface of an organic compound of formula R-A, wherein A is selected from SH, SeH, TeH and SiX3. X is selected from H, Cl, O—CH3, O—C2H5, and O—C3H2, and R is a hydrocarbyl, fluorocarbyl or hydrofluorocarbyl comprising from 5 to 20 carbon atoms. The method further comprises thermally annealing (107) the III-V semiconductor substrate in a non-oxidizing environment such as to decompose the self-assembled monolayer material, and depositing (108) a layer on the III-V semiconductor surface in the non-oxidizing environment."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Layer deposition on III-V semiconductors","description":"The present disclosure relates to a method (100) for depositing a layer on a III-V semiconductor substrate, in which this method comprises providing (102) a passivated III-V semiconductor substrate co","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9685322","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9685322","citation_suggestion":"Patentable. \"Layer deposition on III-V semiconductors\" (US-9685322). https://patentable.app/patents/US-9685322","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9685322","json":"https://patentable.app/api/llm-context/US-9685322","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T16:52:26.988Z"}