{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9690365","patent":{"patent_number":"US-9690365","title":"Dual-rail power equalizer","assignee":null,"inventors":[],"filing_date":"2016-04-26T00:00:00.000Z","publication_date":"2017-06-27T00:00:00.000Z","cpc_codes":["G06F","G06F"],"num_claims":16,"abstract":"A processing device performs dual-rail power equalization for its memory cell array and logic circuitry. The memory cell array is coupled to a first power rail through a first switch to receive a first voltage level. The logic circuitry is coupled to a second power rail through a second switch to receive a second voltage level that is different from the first voltage level. The processing device also includes a power switch coupled to at least the second power rail and operative to be enabled to equalize voltage supplied to the memory cell array and the logic circuitry."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Dual-rail power equalizer","description":"A processing device performs dual-rail power equalization for its memory cell array and logic circuitry. The memory cell array is coupled to a first power rail through a first switch to receive a firs","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9690365","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9690365","citation_suggestion":"Patentable. \"Dual-rail power equalizer\" (US-9690365). https://patentable.app/patents/US-9690365","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9690365","json":"https://patentable.app/api/llm-context/US-9690365","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T11:19:03.750Z"}