{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9691454","patent":{"patent_number":"US-9691454","title":"Memory controller with phase adjusted clock for performing memory operations","assignee":null,"inventors":[],"filing_date":"2016-05-20T00:00:00.000Z","publication_date":"2017-06-27T00:00:00.000Z","cpc_codes":["G11C","G06F","G06F","G06F","G06F","G11C"],"num_claims":16,"abstract":"In an illustrative embodiment, the memory circuit includes first and second data paths on which data is transferred for read and write memory operations and first and second mixer circuits for adjusting the phase of clock signals applied to their inputs. The mixer circuits are cross-coupled so that the outputs of the first and second mixers are both available to both the first and second data paths. One mixer is used to provide a first phase adjusted clock signal for use by the operating circuit and the other mixer is used to provide a second phase adjusted clock signal for use by a following operation whatever that may be."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Memory controller with phase adjusted clock for performing memory operations","description":"In an illustrative embodiment, the memory circuit includes first and second data paths on which data is transferred for read and write memory operations and first and second mixer circuits for adjusti","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9691454","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9691454","citation_suggestion":"Patentable. \"Memory controller with phase adjusted clock for performing memory operations\" (US-9691454). https://patentable.app/patents/US-9691454","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9691454","json":"https://patentable.app/api/llm-context/US-9691454","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T08:07:54.238Z"}