{"schema_version":"1.0","canonical_url":"https://patentable.app/patents/US-9691694","patent":{"patent_number":"US-9691694","title":"Substrate comprising stacks of interconnects, interconnect on solder resist layer and interconnect on side portion of substrate","assignee":null,"inventors":[],"filing_date":"2015-05-04T00:00:00.000Z","publication_date":"2017-06-27T00:00:00.000Z","cpc_codes":["H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L","H01L"],"num_claims":33,"abstract":"An integrated circuit device that includes a package substrate and a die coupled to the package substrate. The package substrate includes at least one dielectric layer, a first stack of first interconnects in the at least one dielectric layer, and a second interconnect formed on at least one side portion of the at least one dielectric layer. The first stack of first interconnects is configured to provide a first electrical path for a non-ground reference signal, where the first stack of first interconnects is located along at least one side of the package substrate. The second interconnect is configured to provide a second electrical path for a ground reference signal."},"analysis":{"summary":null,"layman_explanation":null,"technical_analysis":null,"business_analysis":null,"faqs":null,"topics":[],"tech_cluster":null},"seo":{"title":"Substrate comprising stacks of interconnects, interconnect on solder resist layer and interconnect on side portion of substrate","description":"An integrated circuit device that includes a package substrate and a die coupled to the package substrate. The package substrate includes at least one dielectric layer, a first stack of first intercon","keywords":[]},"attribution":{"source":"Patentable","source_url":"https://patentable.app","canonical_url":"https://patentable.app/patents/US-9691694","license":"CC-BY-4.0-like","license_terms":"AI-generated analysis on this page (summary, layman_explanation, technical_analysis, business_analysis, faqs) may be reused with attribution and a visible link back to the canonical URL above. Patent abstracts, claims, and bibliographic data are USPTO public domain.","required_link":"https://patentable.app/patents/US-9691694","citation_suggestion":"Patentable. \"Substrate comprising stacks of interconnects, interconnect on solder resist layer and interconnect on side portion of substrate\" (US-9691694). https://patentable.app/patents/US-9691694","copyright_holder":"Nomic Interactive Technology LLC"},"links":{"html":"https://patentable.app/patents/US-9691694","json":"https://patentable.app/api/llm-context/US-9691694","site":"https://patentable.app","llms_txt":"https://patentable.app/llms.txt"},"generated_at":"2026-06-06T12:05:56.136Z"}